From a21e3cd8425b71aa0f0c2c00b9a9a7cd6c73270a Mon Sep 17 00:00:00 2001
From: zzz <zzz@mail.i2p>
Date: Mon, 29 Sep 2014 13:05:38 +0000
Subject: [PATCH] CPUID: - Fix main() model and family calculation - Add
model string fetch from processor - AMD model string tweaks
---
.../support/CPUInformation/AMDInfoImpl.java | 29 ++++++++--
.../freenet/support/CPUInformation/CPUID.java | 56 +++++++++++++++++--
.../support/CPUInformation/IntelInfoImpl.java | 6 +-
3 files changed, 79 insertions(+), 12 deletions(-)
diff --git a/core/java/src/freenet/support/CPUInformation/AMDInfoImpl.java b/core/java/src/freenet/support/CPUInformation/AMDInfoImpl.java
index 12e418b2d4..0bbafb146b 100644
--- a/core/java/src/freenet/support/CPUInformation/AMDInfoImpl.java
+++ b/core/java/src/freenet/support/CPUInformation/AMDInfoImpl.java
@@ -364,6 +364,9 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
// APUs
// http://en.wikipedia.org/wiki/List_of_AMD_Accelerated_Processing_Unit_microprocessors
+ // 1st gen Llano high perf / Brazos low power
+ // 2nd gen Trinity high perf / Brazos 2 low power
+ // 3rd gen Kaveri high perf / Kabini/Temash low power
case 18: {
isK6Compatible = true;
isK6_2_Compatible = true;
@@ -371,7 +374,7 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
isAthlonCompatible = true;
isAthlon64Compatible = true;
isX64 = true;
- modelString = "AMD Llano/Trinity/Brazos model " + model;
+ modelString = "AMD APU model " + model;
}
break;
@@ -388,10 +391,10 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
case 1:
// Case 3 is uncertain but most likely a Bobcat APU
case 3:
- modelString = "Bobcat APU";
+ modelString = "AMD Bobcat APU";
break;
default:
- modelString = "AMD Bobcat model " + model;
+ modelString = "AMD Bobcat APU model " + model;
break;
}
}
@@ -408,8 +411,17 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
isBulldozerCompatible = true;
isX64 = true;
switch (model) {
+ // 32 nm
case 1:
- modelString = "Bulldozer FX-6000/8000";
+ modelString = "Bulldozer FX-6100/8100";
+ break;
+ // 32 nm
+ case 2:
+ modelString = "Bulldozer FX-6300/8300";
+ break;
+ // 28 nm ?
+ case 3:
+ modelString = "Bulldozer FX-6500/8500";
break;
default:
modelString = "AMD Bulldozer model " + model;
@@ -427,7 +439,14 @@ class AMDInfoImpl extends CPUIDCPUInfo implements AMDCPUInfo
isAthlon64Compatible = true;
isBobcatCompatible = true;
isX64 = true;
- modelString = "AMD Jaguar model " + model;
+ switch (model) {
+ case 0:
+ modelString = "Athlon 5350 APU";
+ break;
+ default:
+ modelString = "AMD Jaguar APU model " + model;
+ break;
+ }
}
break;
}
diff --git a/core/java/src/freenet/support/CPUInformation/CPUID.java b/core/java/src/freenet/support/CPUInformation/CPUID.java
index 0aab211c7e..37338e9d1c 100644
--- a/core/java/src/freenet/support/CPUInformation/CPUID.java
+++ b/core/java/src/freenet/support/CPUInformation/CPUID.java
@@ -79,8 +79,11 @@ public class CPUID {
{
loadNative();
}
- //A class that can (amongst other things I assume) represent the state of the
- //different CPU registers after a call to the CPUID assembly method
+
+ /**
+ * A class that can (amongst other things I assume) represent the state of the
+ * different CPU registers after a call to the CPUID assembly method
+ */
protected static class CPUIDResult {
final int EAX;
final int EBX;
@@ -206,6 +209,40 @@ public class CPUID {
return c.EDX;
}
+ /**
+ * The model name string, up to 48 characters, as reported by
+ * the processor itself.
+ *
+ * @return trimmed string, null if unsupported
+ * @since 0.9.16
+ */
+ static String getCPUModelName() {
+ CPUIDResult c = doCPUID(0x80000000);
+ long maxSupported = c.EAX & 0xFFFFFFFFL;
+ if (maxSupported < 0x80000004L)
+ return null;
+ StringBuilder buf = new StringBuilder(48);
+ int[] regs = new int[4];
+ for (int fn = 0x80000002; fn <= 0x80000004; fn++) {
+ c = doCPUID(fn);
+ regs[0] = c.EAX;
+ regs[1] = c.EBX;
+ regs[2] = c.ECX;
+ regs[3] = c.EDX;
+ for (int i = 0; i < 4; i++) {
+ int reg = regs[i];
+ for (int j = 0; j < 4; j++) {
+ char ch = (char) (reg & 0xff);
+ if (ch == 0)
+ return buf.toString().trim();
+ buf.append(ch);
+ reg >>= 8;
+ }
+ }
+ }
+ return buf.toString().trim();
+ }
+
/**
* Returns a CPUInfo item for the current type of CPU
* If I could I would declare this method in a interface named
@@ -237,9 +274,19 @@ public class CPUID {
System.out.println("**Failed to retrieve CPUInfo. Please verify the existence of jcpuid dll/so**");
}
System.out.println(" **CPUInfo**");
+ String mname = getCPUModelName();
+ if (mname != null)
+ System.out.println("CPU Model Name: " + mname);
System.out.println("CPU Vendor: " + getCPUVendorID());
- System.out.println("CPU Family: " + getCPUFamily());
- System.out.println("CPU Model: " + getCPUModel());
+ // http://en.wikipedia.org/wiki/Cpuid
+ int family = getCPUFamily();
+ int model = getCPUModel();
+ if (family == 15) {
+ family += getCPUExtendedFamily();
+ model += getCPUExtendedModel() << 4;
+ }
+ System.out.println("CPU Family: " + family);
+ System.out.println("CPU Model: " + model);
System.out.println("CPU Stepping: " + getCPUStepping());
System.out.println("CPU Flags: 0x" + Integer.toHexString(getEDXCPUFlags()));
@@ -253,6 +300,7 @@ public class CPUID {
System.out.println("CPU has SSE4.1: " + c.hasSSE41());
System.out.println("CPU has SSE4.2: " + c.hasSSE42());
System.out.println("CPU has SSE4A: " + c.hasSSE4A());
+ System.out.println("CPU has AES-NI: " + c.hasAES());
if(c instanceof IntelCPUInfo){
System.out.println("\n **Intel-info**");
System.out.println("Is PII-compatible: "+((IntelCPUInfo)c).IsPentium2Compatible());
diff --git a/core/java/src/freenet/support/CPUInformation/IntelInfoImpl.java b/core/java/src/freenet/support/CPUInformation/IntelInfoImpl.java
index c87119b0d9..50472bd69b 100644
--- a/core/java/src/freenet/support/CPUInformation/IntelInfoImpl.java
+++ b/core/java/src/freenet/support/CPUInformation/IntelInfoImpl.java
@@ -227,7 +227,7 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
case 0x17:
modelString = "Core 2 (45nm)";
break;
- // Nahalem 45 nm
+ // Nehalem 45 nm
case 0x1a:
isCoreiCompatible = true;
modelString = "Core i7 (45nm)";
@@ -246,7 +246,7 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
isCoreiCompatible = true;
modelString = "Xeon MP (45nm)";
break;
- // Nahalem 45 nm
+ // Nehalem 45 nm
case 0x1e:
isCoreiCompatible = true;
modelString = "Core i5/i7 (45nm)";
@@ -282,7 +282,7 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
case 0x2d:
modelString = "Sandy Bridge EP";
break;
- // Nahalem 45 nm
+ // Nehalem 45 nm
case 0x2e:
modelString = "Xeon MP (45nm)";
break;
--
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